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CMOS and Semiconductor expert witness #47409

This sample expert has worked on applying fundamental digital signal processing techniques to enhance sensing in array structures including: displays, CMOS imagers and floating-gate/nascent memory technologies (e.g., flash, chalcogenide and magnetic).

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Areas of electrical engineering expertise

  • CMOS memory
  • Interfaces
  • Communication circuits

Educational background

  • Ph.D. in Electrical Engineering, University of Nevada, Reno, NV
  • M.S. and B.S. in Electrical Engineering, University of Nevada, Las Vegas, NV

Employment history

January 1991 – Present: Professor of Electrical and Computer Engineering

Reviewer for IEEE transactions on solid-state circuits, circuits and devices magazine, education, instrumentation, nanotechnology, VLSI, etc. Reviewer for several American Institute of Physics journals as well (Review of Scientific Instruments, Applied Physics letters, etc.) Board member of the IEEE press (reviewed dozens of books and book proposals). Reviewer for the National Institutes of Health. Technology editor and then Editor-in-Chief for the Solid-State Circuits Magazine.

Research is focused on analog and mixed-signal integrated circuit fabrication and design. Worked with multi-disciplinary teams (civil engineering, biology, materials science, etc.) on projects that have been funded by EPA, DARPA, NASA, Army, DMEA, and the AFRL.

Given over 50 invited talks and seminars.

Deposed 24 times and given testimony at 3 trials.